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| PRELIMINARY DATA SHEET LP6836SOT343 PACKAGED MEDIUM POWER PHEMT * FEATURES 0.5 dB Noise Figure at 2 GHz 19 dBm P-1dB 2 GHz, 19 dBm at 6 GHz 20 dB Power Gain at 2 GHz, 10 dB at 6 GHz 70% Power-Added-Efficiency * DESCRIPTION AND APPLICATIONS The LP6836SOT343 is a packaged AlGaAs/InGaAs/AlGaAs pseudomorphic high electron mobility transistor (pHEMT) intended for applications requiring medium output power and/or high dynamic range. It utilizes a 0.25 m x 360 m Schottky barrier gate, defined by electron-beam photolithography. The LP6836's active areas are passivated with Si3N4, and the SOT343 (also known as SC-70) package is ideal for low-cost, high-performance applications that require a surfacemount package. The LP6836SOT343 is designed for commercial systems for use in low noise amplifiers and oscillators operating over the RF and Microwave frequency ranges. The low noise figure makes it appropriate for use in receivers in MMDS and GPS. This device is also suitable as a driver stage for WLAN and ISM band spread spectrum applications. * ELECTRICAL SPECIFICATIONS @ TAmbient = 25C Parameter Saturated Drain-Source Current Power at 1-dB Compression Power Gain at 1-dB Compression Power-Added Efficiency Noise Figure Transconductance Gate-Source Leakage Current Pinch-Off Voltage Gate-Source Breakdown Voltage Magnitude Gate-Drain Breakdown Voltage Magnitude Symbol IDSS P-1dB G-1dB PAE NF GM IGSO VP |VBDGS| |VBDGD| Test Conditions VDS = 2 V; VGS = 0 V f=2GHz; VDS = 3 V; IDS = 50% IDSS f=2GHz; VDS = 3 V; IDS = 50% IDSS f=2GHz; VDS = 3 V; IDS = 50% IDSS; POUT = 19.5 dBm f=2GHz; VDS = 3V; IDS = 25% IDSS f=2GHz; VDS = 3V; IDS = 50% IDSS VDS = 2 V; VGS = 0 V VGS = -5 V VDS = 2 V; IDS = 2 mA IGS = 2 mA IGD = 2 mA -0.25 11 12 15 16 75 Min 80 18 18 19 20 70 0.5 0.7 100 1 10 -2.0 Typ Max 125 Units mA dBm dB % dB dB mS A V V V Phone: (408) 988-1845 Fax: (408) 970-9950 http:// www.filss.com Revised: 1/20/01 Email: sales@filss.com PRELIMINARY DATA SHEET LP6836SOT343 PACKAGED MEDIUM POWER PHEMT * ABSOLUTE MAXIMUM RATINGS Parameter Drain-Source Voltage Gate-Source Voltage Drain-Source Current Gate Current RF Input Power Channel Operating Temperature Storage Temperature Symbol VDS VGS IDS IG PIN TCH TSTG Test Conditions TAmbient = 22 3 C TAmbient = 22 3 C TAmbient = 22 3 C TAmbient = 22 3 C TAmbient = 22 3 C TAmbient = 22 3 C -- -65 Min Max 7 -3 IDSS 5 60 175 175 Units V V mA mA mW C C Notes: Even temporary operating conditions that exceed the Absolute Maximum Ratings could result in permanent damage to the device. * HANDLING PRECAUTIONS To avoid damage to the devices care should be exercised during handling. Proper Electrostatic Discharge (ESD) precautions should be observed at all stages of storage, handling, assembly, and testing. These devices should be treated as Class 1A (0-500 V). Further information on ESD control measures can be found in MIL-STD-1686 and MIL-HDBK-263. APPLICATIONS NOTES & DESIGN DATA Applications Notes are available from your local Filtronic Sales Representative or directly from the factory. Complete design data, including S-parameters, noise data, and large-signal models are available on the Filtronic web site. PACKAGE OUTLINE (dimensions in mm) SOURCE GATE * * DRAIN SOURCE All information and specifications are subject to change without notice. Phone: (408) 988-1845 Fax: (408) 970-9950 http:// www.filss.com Revised: 1/20/01 Email: sales@filss.com |
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